BSR
— Bit Scan Reverse
Opcode |
Instruction |
Op/En |
64-bit Mode |
Compat/Leg Mode |
Description |
0F BD /r |
BSR r16, r/m16 |
RM |
Valid |
Valid |
Bit scan reverse on r/m16. |
0F BD /r |
BSR r32, r/m32 |
RM |
Valid |
Valid |
Bit scan reverse on r/m32. |
REX.W + 0F BD /r |
BSR r64, r/m64 |
RM |
Valid |
N.E. |
Bit scan reverse on r/m64. |
Instruction Operand Encoding
¶
Op/En |
Operand 1 |
Operand 2 |
Operand 3 |
Operand 4 |
RM |
ModRM:reg (w) |
ModRM:r/m (r) |
N/A |
N/A |
Description
¶
Searches the source operand (second operand) for the most significant set bit (1 bit). If a most significant 1 bit is found, its bit index is stored in the destination operand (first operand). The source operand can be a register or a memory location; the destination operand is a register. The bit index is an unsigned offset from bit 0 of the source operand. If the content source operand is 0, the content of the destination operand is undefined.
In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.
Operation
¶
IF SRC = 0
THEN
ZF := 1;
DEST is undefined;
ELSE
ZF := 0;
temp := OperandSize – 1;
WHILE Bit(SRC, temp) = 0
DO
temp := temp - 1;
OD;
DEST := temp;
FI;
Flags Affected
¶
The ZF flag is set to 1 if the source operand is 0; otherwise, the ZF flag is cleared. The CF, OF, SF, AF, and PF flags are undefined.
Protected Mode Exceptions
¶
#GP(0) |
If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. |
If the DS, ES, FS, or GS register contains a NULL segment selector. |
#SS(0) |
If a memory operand effective address is outside the SS segment limit. |
#PF(fault-code) |
If a page fault occurs. |
#AC(0) |
If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. |
#UD |
If the LOCK prefix is used. |
Real-Address Mode Exceptions
¶
#GP |
If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. |
#SS |
If a memory operand effective address is outside the SS segment limit. |
#UD |
If the LOCK prefix is used. |
Virtual-8086 Mode Exceptions
¶
#GP(0) |
If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. |
#SS(0) |
If a memory operand effective address is outside the SS segment limit. |
#PF(fault-code) |
If a page fault occurs. |
#AC(0) |
If alignment checking is enabled and an unaligned memory reference is made. |
#UD |
If the LOCK prefix is used. |
Compatibility Mode Exceptions
¶
Same exceptions as in protected mode.
64-Bit Mode Exceptions
¶
#SS(0) |
If a memory address referencing the SS segment is in a non-canonical form. |
#GP(0) |
If the memory address is in a non-canonical form. |
#PF(fault-code) |
If a page fault occurs. |
#AC(0) |
If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. |
#UD |
If the LOCK prefix is used. |